PCIe OF overlay driver

[rodrigo455]

Support ADI PCIe endpoints described by a device-tree overlay

The cover letter:

Analog Devices FPGA designs can be exposed as a PCIe endpoint whose BARs
window an AXI interconnect full of memory-mapped peripherals: DMA engines,
ADC/DAC interfaces, system ID cores and so on. Those peripherals already
have some upstream drivers, which often rely on dt/fw properties.

This series follows the strategy of drivers/misc/lan966x_pci.c: apply a
device-tree overlay under the endpoint's OF node and let the existing
platform drivers probe the devices it describes. It differs in three ways.

The overlay is requested as firmware, named by a module parameter, rather
than embedded in the module, so one driver serves designs whose contents
differ per bitstream.

The endpoint's OF node is created by the driver. lan966x_pci requires the
PCI core to have made one already (via quirks) and fails if it did not.
Patch 1 adds devm_of_pci_make_dev_node(), which creates the node on demand,
leaves an existing one alone, and removes what it created on unbind.

Interrupts revolve around a dedicated interrupt controller in the FPGA
rather than a single shared line. lan966x_pci maps one dummy_irq_chip
hwirq, which is all a single-interrupt endpoint needs. A design with
several DMA engines needs per-source masking and acknowledgement, so the
int controller behind BAR0 reports how many sources it samples and how
many vectors it implements, and the driver registers a real irq_chip over
it -- mask, unmask, eoi and set_affinity -- with MSI-X, MSI or shared INTx
as the parent. Each source is routed to one of the granted vectors, and
each vector is installed as a chained handler that claims and dispatches
what it collected.

The other half of the problem is DMA. The platform devices created from
the overlay are not PCI devices and have no IOMMU group, so on a
translated host a DMA engine behind a BAR would be programmed with
physical addresses while its transactions arrive at the IOMMU under the
endpoint's requester ID. Patch 4 joins those children to the endpoint's
IOMMU group so the DMA API allocates their IOVAs out of the domain that
will translate them; patch 2 is the iommu/dma prerequisite, since a device
that only shares a group has no per-device IOMMU state.

The driver declares no PCI device table, and binding is left to the user
through driver_override or new_id. Three things have to settle first:
upstreaming of the platform drivers for these peripherals has fallen
behind, so no endpoint yet has all of its contents served by upstream
code; the vendor ID and device ID pair a product will carry is not agreed
on; and the boards tested so far are FPGA-based SoCs, whose designs change
frequently at this initial phase. A later patch can add a table once a
first entry meets all of those requirements.

Patches 7 and 8 let the AXI-DMAC and AXI-ADC drivers build for such an
endpoint. Their architecture dependency lists soft cores and Zynq, which
excludes the host architectures that reach the core over PCIe, x86_64
among them.

PR Type

• Bug fix (a change that fixes an issue)
• New feature (a change that adds new functionality)
• Breaking change (a change that affects other repos or cause CIs to fail)

PR Checklist

• I have conducted a self-review of my own code changes
• I have compiled my changes, including the documentation
• I have tested the changes on the relevant hardware
• I have updated the documentation outside this repo accordingly
• I have provided links for the relevant upstream lore

[rodrigo455]

this is likely misplaced, will move out from this function

[github-actions]

LLM review

This series adds a PCI driver (adi-pcie-of-overlay) that applies a firmware device-tree
overlay under an ADI PCIe endpoint's OF node so upstream platform drivers can bind to what's
behind its BARs, together with the prerequisites for that (devm_of_pci_make_dev_node(), an
iommu/dma fix for devices that only share another device's IOMMU group), an IRQ-affinity
callback, MSI-X table programming under plain MSI, and Kconfig changes so AXI_DMAC and
ADI_AXI_ADC can build for such PCIe-attached endpoints.

Session: 35642498388

CI: drivers/pci/of.c:505 -fanalyzer NULL deref

Reproduced with KCFLAGS=-fanalyzer; git blame shows the line predates this series
(unrelated merge 5b13d271879e). Pre-existing false positive, resurfaces only because of.c
gains devm_of_pci_make_dev_node() at EOF (0f8cdda2df5c).

8d7a34d3a133 - program the controller's table under plain msi

Self-flagged, still open: the review comment on drivers/misc/adi-pcie-of-overlay.c:456 ("this
is likely misplaced, will move out from this function") is unaddressed through ed9c3d9e.
adi_pcie_msi_hook_install() is called from inside adi_pcie_irq_domain_setup()
(irqdomain/chained-handler wiring) rather than with the rest of one-time controller setup in
adi_pcie_intc_probe(). Not a functional bug — traced that no child can reach an unmasked
interrupt before the hook and its explicit resync run — just the outstanding cleanup.

ed9c3d9eed93 - Kconfig continuation indentation

drivers/iio/adc/Kconfig's new depends on ... \ continuation line is indented one tab deeper
than the near-identical continuation 4cb41af5e0a9 adds to drivers/dma/Kconfig right before it
in the series; checkpatch doesn't check Kconfig continuation alignment so this slipped
through.

Verification data

• Built adi-pcie-of-overlay.o, dma-axi-dmac.o, adi-axi-adc.o, dma-iommu.o, pci/of.o for
  x86_64, arm and arm64 via set_arch/auto_set_kconfig at this range's base/head SHAs, W=1:
  clean on all three.
• sparse (make C=2) and checkpatch.pl --strict on every real commit: clean beyond generic,
  pre-existing tool false positives (reproduced on unmodified files).
• Cross-checked axi_pcie_intc's BAR0 offset against
  analogdevicesinc/hdl@7ad7ac04a47c3c66845d8278e20262176cf6b29c (fetched via the GitHub API):
  BAR0+0x10000 for the interrupt controller matches ADI_PCIE_INTC_OFFSET exactly. The PCIe
  hard IP's own MSI-X table (BAR0+0x8000) is a disjoint 64 KB block from pcie_intc's window, so
  the driver's ADI_PCIE_INTC_MSIX_TABLE (relative to apo->intc, landing at BAR0+0x18000) must
  be a second, IP-internal shadow table — consistent with the commit message, but the
  axi_pcie_intc RTL isn't published yet, so its internal field layout can't be independently
  confirmed beyond that.
• Traced BUS_NOTIFY_ADD_DEVICE (e35eca13a55e) vs. of_dma_configure() ordering: the notifier
  fires from device_add(), strictly before DMA configuration at probe time — no race between
  IOMMU-group joining and a child's dma-ranges/dma-coherent parsing.

Suggested patches

• 0001-fixup-misc-adi-pcie-of-overlay-program-the-controlle.patch (8d7a34d3a133) — moves the
  MSI-X table hook install out of adi_pcie_irq_domain_setup() into adi_pcie_intc_probe(),
  resolving the author's own review comment. No functional change; rebuilt clean under W=1.
• 0002-fixup-iio-adc-adi-axi-adc-allow-build-for-pcie-attac.patch (ed9c3d9eed93) — fixes the
  stray extra tab in the depends on continuation line.

Apply with:

cd path/to/repository
export GITHUB_TOKEN=ghp_***
apply-patches --repo=analogdevicesinc/linux 35642498388

Install instructions

The following one-liner installs the script if not present already:

curl -fSsL "https://raw.githubusercontent.com/analogdevicesinc/doctools/refs/heads/main/ci/scripts/apply-patches.sh"      -o ~/.local/bin/apply-patches.sh &&   grep -q "/apply-patches.sh" ~/.bashrc || echo "source ~/.local/bin/apply-patches.sh" >> $_ ; . $_

More information at AI Usage.

[gastmaier]

@rodrigo455 can you cherry-pick your series on next again? i looks like the source branch rebased