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387 lines (346 loc) · 15.7 KB
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// Code taken from https://docs.microsoft.com/en-us/cpp/intrinsics/cpuid-cpuidex?redirectedfrom=MSDN&view=msvc-170
// Modifications marked with `BSC]]` initials
// InstructionSet.cpp
// Compile by using: cl /EHsc /W4 InstructionSet.cpp
// processor: x86, x64
// Uses the __cpuid intrinsic to get information about
// CPU extended instruction set support.
#include <iostream>
#include <vector>
#include <bitset>
#include <array>
#include <string>
#include <intrin.h>
// BSC]] BEGIN
// demo from https://revers.engineering/detecting-hypervisor-presence-on-windows-10/
// modified to compile
enum HYPERVStatus {
STATUS_HYPERV_DETECTED,
STATUS_HV_NOT_PRESENT
};
//NOTE: this is returning true when you turn on virtualization in bios
// you can check that by pulling up task manager and viewing performance tab
unsigned long UmIsVirtualized(void) {
unsigned int invalid_leaf = 0x13371337;
unsigned int valid_leaf = 0x40000000;
std::array<int, 4> InvalidLeafResponse;
std::array<int, 4> ValidLeafResponse;
__cpuid(InvalidLeafResponse.data(), invalid_leaf);
__cpuid(ValidLeafResponse.data(), valid_leaf);
if ((InvalidLeafResponse[0] != ValidLeafResponse[0]) ||
(InvalidLeafResponse[1] != ValidLeafResponse[1]) ||
(InvalidLeafResponse[2] != ValidLeafResponse[2]) ||
(InvalidLeafResponse[3] != ValidLeafResponse[3]))
return STATUS_HYPERV_DETECTED;
return STATUS_HV_NOT_PRESENT;
}
struct ChromiumBaseCpuFields {
bool has_mmx_;
bool has_sse_;
bool has_sse2_;
bool has_sse3_;
bool has_ssse3_;
bool has_sse41_;
bool has_sse42_;
bool has_popcnt_;
bool is_running_in_vm_;
// added from https://revers.engineering/detecting-hypervisor-presence-on-windows-10/
bool UmIsVirtualized_;
};
// BSC]] END
class InstructionSet {
// forward declarations
class InstructionSet_Internal;
public:
// getters
static std::string Vendor(void) { return CPU_Rep.vendor_; }
static std::string Brand(void) { return CPU_Rep.brand_; }
static bool SSE3(void) { return CPU_Rep.f_1_ECX_[0]; }
static bool PCLMULQDQ(void) { return CPU_Rep.f_1_ECX_[1]; }
static bool MONITOR(void) { return CPU_Rep.f_1_ECX_[3]; }
static bool SSSE3(void) { return CPU_Rep.f_1_ECX_[9]; }
static bool FMA(void) { return CPU_Rep.f_1_ECX_[12]; }
static bool CMPXCHG16B(void) { return CPU_Rep.f_1_ECX_[13]; }
static bool SSE41(void) { return CPU_Rep.f_1_ECX_[19]; }
static bool SSE42(void) { return CPU_Rep.f_1_ECX_[20]; }
static bool MOVBE(void) { return CPU_Rep.f_1_ECX_[22]; }
static bool POPCNT(void) { return CPU_Rep.f_1_ECX_[23]; }
static bool AES(void) { return CPU_Rep.f_1_ECX_[25]; }
static bool XSAVE(void) { return CPU_Rep.f_1_ECX_[26]; }
static bool OSXSAVE(void) { return CPU_Rep.f_1_ECX_[27]; }
static bool AVX(void) { return CPU_Rep.f_1_ECX_[28]; }
static bool F16C(void) { return CPU_Rep.f_1_ECX_[29]; }
static bool RDRAND(void) { return CPU_Rep.f_1_ECX_[30]; }
static bool MSR(void) { return CPU_Rep.f_1_EDX_[5]; }
static bool CX8(void) { return CPU_Rep.f_1_EDX_[8]; }
static bool SEP(void) { return CPU_Rep.f_1_EDX_[11]; }
static bool CMOV(void) { return CPU_Rep.f_1_EDX_[15]; }
static bool CLFSH(void) { return CPU_Rep.f_1_EDX_[19]; }
static bool MMX(void) { return CPU_Rep.f_1_EDX_[23]; }
static bool FXSR(void) { return CPU_Rep.f_1_EDX_[24]; }
static bool SSE(void) { return CPU_Rep.f_1_EDX_[25]; }
static bool SSE2(void) { return CPU_Rep.f_1_EDX_[26]; }
static bool FSGSBASE(void) { return CPU_Rep.f_7_EBX_[0]; }
static bool BMI1(void) { return CPU_Rep.f_7_EBX_[3]; }
static bool HLE(void) { return CPU_Rep.isIntel_ && CPU_Rep.f_7_EBX_[4]; }
static bool AVX2(void) { return CPU_Rep.f_7_EBX_[5]; }
static bool BMI2(void) { return CPU_Rep.f_7_EBX_[8]; }
static bool ERMS(void) { return CPU_Rep.f_7_EBX_[9]; }
static bool INVPCID(void) { return CPU_Rep.f_7_EBX_[10]; }
static bool RTM(void) { return CPU_Rep.isIntel_ && CPU_Rep.f_7_EBX_[11]; }
static bool AVX512F(void) { return CPU_Rep.f_7_EBX_[16]; }
static bool RDSEED(void) { return CPU_Rep.f_7_EBX_[18]; }
static bool ADX(void) { return CPU_Rep.f_7_EBX_[19]; }
static bool AVX512PF(void) { return CPU_Rep.f_7_EBX_[26]; }
static bool AVX512ER(void) { return CPU_Rep.f_7_EBX_[27]; }
static bool AVX512CD(void) { return CPU_Rep.f_7_EBX_[28]; }
static bool SHA(void) { return CPU_Rep.f_7_EBX_[29]; }
static bool PREFETCHWT1(void) { return CPU_Rep.f_7_ECX_[0]; }
static bool LAHF(void) { return CPU_Rep.f_81_ECX_[0]; }
static bool LZCNT(void) { return CPU_Rep.isIntel_ && CPU_Rep.f_81_ECX_[5]; }
static bool ABM(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_ECX_[5]; }
static bool SSE4a(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_ECX_[6]; }
static bool XOP(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_ECX_[11]; }
static bool TBM(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_ECX_[21]; }
static bool SYSCALL(void) { return CPU_Rep.isIntel_ && CPU_Rep.f_81_EDX_[11]; }
static bool MMXEXT(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_EDX_[22]; }
static bool RDTSCP(void) { return CPU_Rep.isIntel_ && CPU_Rep.f_81_EDX_[27]; }
static bool _3DNOWEXT(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_EDX_[30]; }
static bool _3DNOW(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_EDX_[31]; }
// BSC]] START
static ChromiumBaseCpuFields ChromiumValues(void) { return CPU_Rep.chromium_values_; }
// BSC]] END
private:
static const InstructionSet_Internal CPU_Rep;
class InstructionSet_Internal {
public:
InstructionSet_Internal()
: nIds_{ 0 },
nExIds_{ 0 },
isIntel_{ false },
isAMD_{ false },
f_1_ECX_{ 0 },
f_1_EDX_{ 0 },
f_7_EBX_{ 0 },
f_7_ECX_{ 0 },
f_81_ECX_{ 0 },
f_81_EDX_{ 0 },
data_{},
extdata_{}
{
//int cpuInfo[4] = {-1};
std::array<int, 4> cpui;
// Calling __cpuid with 0x0 as the function_id argument
// gets the number of the highest valid function ID.
__cpuid(cpui.data(), 0);
nIds_ = cpui[0];
for (int i = 0; i <= nIds_; ++i) {
__cpuidex(cpui.data(), i, 0);
data_.push_back(cpui);
}
// Capture vendor string
char vendor[0x20];
memset(vendor, 0, sizeof(vendor));
*reinterpret_cast<int*>(vendor) = data_[0][1];
*reinterpret_cast<int*>(vendor + 4) = data_[0][3];
*reinterpret_cast<int*>(vendor + 8) = data_[0][2];
vendor_ = vendor;
if (vendor_ == "GenuineIntel") {
isIntel_ = true;
} else if (vendor_ == "AuthenticAMD") {
isAMD_ = true;
}
// load bitset with flags for function 0x00000001
if (nIds_ >= 1) {
f_1_ECX_ = data_[1][2];
f_1_EDX_ = data_[1][3];
}
// load bitset with flags for function 0x00000007
if (nIds_ >= 7) {
f_7_EBX_ = data_[7][1];
f_7_ECX_ = data_[7][2];
}
// BSC]] START
// demo using Chromium code
// base/cpu.cc => CPU::Initialize()
// see https://source.chromium.org/chromium/chromium/src/+/main:base/cpu.cc;l=226;drc=f45f47606083b408b7d08c68b1167e8ffcd38e76
std::array<int, 4> cpui2;
__cpuid(cpui2.data(), 1);
chromium_values_.has_mmx_ = (cpui2[3] & 0x00800000) != 0;
chromium_values_.has_sse_ = (cpui2[3] & 0x02000000) != 0;
chromium_values_.has_sse2_ = (cpui2[3] & 0x04000000) != 0;
chromium_values_.has_sse3_ = (cpui2[2] & 0x00000001) != 0;
chromium_values_.has_ssse3_ = (cpui2[2] & 0x00000200) != 0;
chromium_values_.has_sse41_ = (cpui2[2] & 0x00080000) != 0;
chromium_values_.has_sse42_ = (cpui2[2] & 0x00100000) != 0;
chromium_values_.has_popcnt_ = (cpui2[2] & 0x00800000) != 0;
// this is the value causing a problem for our testing.
// https://lwn.net/Articles/301888/ was cited in Chromium code but it may be irrelevant / outdated.
chromium_values_.is_running_in_vm_ = (cpui2[2] & 0x80000000) != 0;
chromium_values_.UmIsVirtualized_ = UmIsVirtualized() == STATUS_HYPERV_DETECTED;
// BSC]] END
// Calling __cpuid with 0x80000000 as the function_id argument
// gets the number of the highest valid extended ID.
__cpuid(cpui.data(), 0x80000000);
nExIds_ = cpui[0];
char brand[0x40];
memset(brand, 0, sizeof(brand));
for (int i = 0x80000000; i <= nExIds_; ++i) {
__cpuidex(cpui.data(), i, 0);
extdata_.push_back(cpui);
}
// load bitset with flags for function 0x80000001
if (nExIds_ >= 0x80000001) {
f_81_ECX_ = extdata_[1][2];
f_81_EDX_ = extdata_[1][3];
}
// Interpret CPU brand string if reported
if (nExIds_ >= 0x80000004) {
memcpy(brand, extdata_[2].data(), sizeof(cpui));
memcpy(brand + 16, extdata_[3].data(), sizeof(cpui));
memcpy(brand + 32, extdata_[4].data(), sizeof(cpui));
brand_ = brand;
}
};
int nIds_;
int nExIds_;
std::string vendor_;
std::string brand_;
bool isIntel_;
bool isAMD_;
std::bitset<32> f_1_ECX_;
std::bitset<32> f_1_EDX_;
std::bitset<32> f_7_EBX_;
std::bitset<32> f_7_ECX_;
std::bitset<32> f_81_ECX_;
std::bitset<32> f_81_EDX_;
std::vector<std::array<int, 4>> data_;
std::vector<std::array<int, 4>> extdata_;
// BSC]] START
ChromiumBaseCpuFields chromium_values_;
// BSC]] END
};
};
// Initialize static member data
const InstructionSet::InstructionSet_Internal InstructionSet::CPU_Rep;
// Print out supported instruction set extensions
// BSC]] START
// EXPERIMENTAL CODE TO CALL invvpid instruction
//typedef uint16_t u16;
typedef uint8_t u8;
typedef uint64_t u64;
//typedef unsigned long gva_t;
//#define VMX_NR_VPIDS (1 << 16)
#define VMX_VPID_EXTENT_INDIVIDUAL_ADDR 0
#define VMX_VPID_EXTENT_SINGLE_CONTEXT 1
#define VMX_VPID_EXTENT_ALL_CONTEXT 2
//#define VMX_VPID_EXTENT_SINGLE_NON_GLOBAL 3
// see https://www.felixcloutier.com/x86/invvpid for opcode info
//#define ASM_VMX_INVVPID ".byte 0x66, 0x0f, 0x38, 0x81, 0x08"
//shout out to https://github.com/wbenny/hvpp
// and https://github.com/asamy/ksm/blob/6ef52b87903b25c62560d80e8fbec0867e5c2a8b/vmx.h
//enum class invvpid_t : uint32_t {
// individual_address = 0x00000000,
// single_context = 0x00000001,
// all_contexts = 0x00000002,
// single_context_retaining_globals = 0x00000003,
//};
//struct invvpid_desc_t {
// uint64_t vpid : 16;
// uint64_t reserved : 48;
// uint64_t linear_address;
//};
typedef struct {
u64 vpid : 16;
u64 rsvd : 48;
u64 gva;
} invvpid_t;
extern "C" {
u8 __invvpid(u64 type, const invvpid_t* i);
}
inline u8 invvpid(u64 type) {
static invvpid_t demo = { 0, 0, 0 };
return __invvpid(type, &demo);
}
// rename main() => InstructionSet_main() and change return type to void
void InstructionSet_main() {
std::cout << std::endl << __FILE__ << std::endl;
// BSC]] END
auto& outstream = std::cout;
auto support_message = [&outstream](std::string isa_feature, bool is_supported) {
outstream << isa_feature << (is_supported ? " supported" : " not supported") << std::endl;
};
// BSC]] START
auto dump_chromium = [&outstream](ChromiumBaseCpuFields values) {
outstream << "BEGIN - Chromium Base::CPU fields" << std::endl;
outstream << "has_mmx_ = " << values.has_mmx_ << std::endl;
outstream << "has_sse_ = " << values.has_sse_ << std::endl;
outstream << "has_sse2_ = " << values.has_sse2_ << std::endl;
outstream << "has_sse3_ = " << values.has_sse3_ << std::endl;
outstream << "has_ssse3_ = " << values.has_ssse3_ << std::endl;
outstream << "has_sse41_ = " << values.has_sse41_ << std::endl;
outstream << "has_sse42_ = " << values.has_sse42_ << std::endl;
outstream << "has_popcnt_ = " << values.has_popcnt_ << std::endl;
outstream << "is_running_in_vm_ = " << values.is_running_in_vm_ << std::endl;
outstream << "UmIsVirtualized = " << values.UmIsVirtualized_ << std::endl;
outstream << "END - Chromium Base::CPU fields" << std::endl;
};
// experimental code to call invvpid instruction (clearing TLB)
//u8 val = invvpid(VMX_VPID_EXTENT_ALL_CONTEXT);
//outstream << "invvpid returned " << val << std::endl;
dump_chromium(InstructionSet::ChromiumValues());
// BSC]] END
std::cout << InstructionSet::Vendor() << std::endl;
std::cout << InstructionSet::Brand() << std::endl;
support_message("3DNOW", InstructionSet::_3DNOW());
support_message("3DNOWEXT", InstructionSet::_3DNOWEXT());
support_message("ABM", InstructionSet::ABM());
support_message("ADX", InstructionSet::ADX());
support_message("AES", InstructionSet::AES());
support_message("AVX", InstructionSet::AVX());
support_message("AVX2", InstructionSet::AVX2());
support_message("AVX512CD", InstructionSet::AVX512CD());
support_message("AVX512ER", InstructionSet::AVX512ER());
support_message("AVX512F", InstructionSet::AVX512F());
support_message("AVX512PF", InstructionSet::AVX512PF());
support_message("BMI1", InstructionSet::BMI1());
support_message("BMI2", InstructionSet::BMI2());
support_message("CLFSH", InstructionSet::CLFSH());
support_message("CMPXCHG16B", InstructionSet::CMPXCHG16B());
support_message("CX8", InstructionSet::CX8());
support_message("ERMS", InstructionSet::ERMS());
support_message("F16C", InstructionSet::F16C());
support_message("FMA", InstructionSet::FMA());
support_message("FSGSBASE", InstructionSet::FSGSBASE());
support_message("FXSR", InstructionSet::FXSR());
support_message("HLE", InstructionSet::HLE());
support_message("INVPCID", InstructionSet::INVPCID());
support_message("LAHF", InstructionSet::LAHF());
support_message("LZCNT", InstructionSet::LZCNT());
support_message("MMX", InstructionSet::MMX());
support_message("MMXEXT", InstructionSet::MMXEXT());
support_message("MONITOR", InstructionSet::MONITOR());
support_message("MOVBE", InstructionSet::MOVBE());
support_message("MSR", InstructionSet::MSR());
support_message("OSXSAVE", InstructionSet::OSXSAVE());
support_message("PCLMULQDQ", InstructionSet::PCLMULQDQ());
support_message("POPCNT", InstructionSet::POPCNT());
support_message("PREFETCHWT1", InstructionSet::PREFETCHWT1());
support_message("RDRAND", InstructionSet::RDRAND());
support_message("RDSEED", InstructionSet::RDSEED());
support_message("RDTSCP", InstructionSet::RDTSCP());
support_message("RTM", InstructionSet::RTM());
support_message("SEP", InstructionSet::SEP());
support_message("SHA", InstructionSet::SHA());
support_message("SSE", InstructionSet::SSE());
support_message("SSE2", InstructionSet::SSE2());
support_message("SSE3", InstructionSet::SSE3());
support_message("SSE4.1", InstructionSet::SSE41());
support_message("SSE4.2", InstructionSet::SSE42());
support_message("SSE4a", InstructionSet::SSE4a());
support_message("SSSE3", InstructionSet::SSSE3());
support_message("SYSCALL", InstructionSet::SYSCALL());
support_message("TBM", InstructionSet::TBM());
support_message("XOP", InstructionSet::XOP());
support_message("XSAVE", InstructionSet::XSAVE());
}